The invention relates to a method in accordance with the preamble to patent claim 1. A method of this type is generally known.
So-called delta-sigma converters are preferably used for the high-resolution conversion of analog useful signals, especially in the audio range. These converters create a data flow with an extremely high pulse rate in a modulator control circuit, wherein the area content of the digital states of the digital output signal represents the analog information. Thus, the digital information is initially received in the time plane, wherein the achievable resolution of the useful signal represents a function of the pulse frequency. However, the pulse frequency cannot be selected optionally high since the inaccuracies of the signal pulse edges in the form of jitter and edge noise are entered directly into the useful information. By using the presently available technologies, a resolution of 24 bit and a dynamic (signal distance between noise and full scale) of approximately 117 dB (A-weighted) is achieved for delta-sigma converters. However, these values are approximately 15 to 25 dB below the dynamic data, which are required in the area of professional audio signal processing.
The practice of dividing the dynamic range to be mastered into several, preferably two, partial ranges, as shown in FIG. 1, is generally known for increasing the dynamic scope during the analog-to-digital conversion. FIG. 1 shows that the input signal S1 is transmitted in a first signal path via an adder 2 to an amplifier 3, in which low-level signals are analog amplified, for example by +30 dB. The amplified signal S2 is supplied in the first signal path to an analog-to-digital converter 5. The input signal S1 furthermore is supplied in a second signal path and without amplification to a second analog-to-digital converter 6. The two digitized signals S5 and S6 from the first signal path and the second signal path are then supplied to a digital signal processor 7 for further signal processing. At the output of this processor, the final digital output signal S7 is generated by assembling the signals S5 and S6.
With small signal amplitudes, which do not overdrive the amplifier 3 or the analog-to-digital converter 5 in the first signal path, the digital signal S5 is reduced with the aid of the digital signal processor 7 by the amplification of the amplifier 3 in order to generate the output signal S7. As a result, the digital noise from the analog-to-digital converter 5 is reduced by the same amount. The digital signal S5 that is reduced by the amplification of the amplifier 3 is then switched through as output signal S7 by the digital signal processor 7. In contrast, the digital signal S6 at the analog-to-digital converter 6 output remains turned off by the digital signal processor 7.
With larger signal amplitudes that can no longer be processed by the first analog-to-digital converter 5, the digital output signal S5 of this converter is turned off or blanked out with the digital signal processor 7. The digital output signal S6 from the analog-digital converter 6, which is obtained from the non-amplified input signal S1, is used by the digital signal processor 7 as output signal S7.
In order to avoid an undesirable overdriving of amplifier 3, a non-linear network can be connected in the negative feedback path of amplifier 3, for example in the form of back-to-back diodes D1, D2. As a result, the amplification of amplifier 3 is reduced for large signal amplitudes, which exceed the modulation range of the analog-to-digital converter 5 and are limited there.
The method explained with the aid of FIG. 1 is known in expert circles as xe2x80x9cgain stagingxe2x80x9d and has, among other things, the following disadvantages:
The resolution of the useful information in the digital output signal S7 at the changeover point, during the takeover of the digitized signals S5, S6 from the first or second signal path changes abruptly. The changeover point typically is in the center of the dynamic operating range for the useful signal. This abrupt change in resolution above all affects audio programming signals where sounds with high and very low levels occur simultaneously.
The timely detection of the changeover point from the digitized useful signal that changes, specifically with higher-frequency signal shares, is a problem not least because of the extreme band-width delimitation due to principle of analog-to-digital converters.
The balancing accuracy with respect to amplification and time behavior between the analog and digital signal processing with complementary effect must be extremely high to avoid distortions.
The purposeful overdriving of the amplifier 3 in the first signal path poses high requirements. It should operate completely without delay, which is critical especially for the transition from an overdriven to the normal operational state.
Even if the purposeful overdriving of the amplifier 3 in the first signal path functions completely without problems, errors cannot be avoided at the moment of changeover from the signal S6 to the signal S5. This is due to the fact that the digital decimation filter in the analog-to-digital converter 5 contains erroneous data following an overdriving of the analog-to-digital converter 5 and does not start operating without problems until after a typical throughput time in the range of 0.5 to 1 ms.
Using a method of the aforementioned type, it is therefore the object of the invention to avoid an abrupt change in the signal resolution and in the switching operations for the useful signal. The object furthermore is to achieve a better use of the two signal paths, resulting in a higher or maximum possible signal resolution for larger signal amplitudes and thus an increased dynamic scope while, simultaneously, permitting an uncritical signal processing that is simple and error-free with respect to the digital post processing.
This object is solved with the characterizing features in claim 1.
Advantageous embodiments and modifications of the inventive method according to claim 1 follow from the dependent claims.